{"id":2614,"date":"2019-06-10T07:18:41","date_gmt":"2019-06-10T07:18:41","guid":{"rendered":""},"modified":"2019-06-10T15:18:58","modified_gmt":"2019-06-10T07:18:58","slug":"fpga%e9%9a%be%e4%bb%a5%e9%80%be%e8%b6%8a%e7%9a%84%e7%93%b6%e9%a2%88%e7%a9%b6%e7%ab%9f%e8%af%a5%e5%a6%82%e4%bd%95%e7%aa%81%e7%a0%b4","status":"publish","type":"post","link":"http:\/\/www.szryc.com\/?p=2614","title":{"rendered":"FPGA\u96be\u4ee5\u903e\u8d8a\u7684\u74f6\u9888\u7a76\u7adf\u8be5\u5982\u4f55\u7a81\u7834"},"content":{"rendered":"

\n\t\u5982\u4eca\uff0c\u7535\u5b50\u884c\u4e1a\u53d1\u5c55\u901f\u5ea6\u4ee4\u4eba\u77a0\u820c\uff0c5G<\/u>\u3001AI<\/u>\u3001\u5de5\u4e1a4.0\u3001\u667a\u80fd\u6c7d\u8f66\u4e00\u6ce2\u53c8\u4e00\u6ce2\u7684\u5e94\u7528\u9769\u65b0\u5f15\u9886\u4e86“\u65b0\u6d6a\u6f6e”\uff0c\u4f46\u968f\u4e4b\u5e26\u6765\u7684\u5c31\u662f\u5de8\u91cf\u7684\u8ba1\u7b97\u3001\u5206\u6790\u3001\u5904\u7406\u91cf\u3002\u6570\u636e\u663e\u793a\uff0c2019\u5e74\u6570\u636e\u603b\u91cf\u5c06\u8fbe40ZB\u603b\u91cf\uff0c\u5982\u6b64\u5e9e\u5927\u7684\u6f5c\u5728\u8ba1\u7b97\u91cf\uff0cFPGA<\/u>\u7684\u5c0f\u5c3a\u5bf8\u3001\u4f4e\u529f\u8017\u4ee5\u53ca\u9ad8\u7075\u6d3b\u6027\u7b49\u7279\u70b9\u6070\u4e0e\u65b0\u5174\u6280\u672f“\u4e0d\u8c0b\u800c\u5408”\u3002<\/p>\n

\n\t\u636eSemi<\/u>co\u7edf\u8ba1\uff0cFPGA\u5e02\u573a\u6b63\u5728\u9010\u5e74\u589e\u957f\uff0c\u800c\u590d\u5408\u5e74\u5747\u589e\u957f\u7387\u9ad8\u8fbe38.4%\uff0c\u81f32023\u5e74\u5c06\u5177\u670955\u4ebf-60\u4ebf\u7f8e\u5143\u7684\u89c4\u6a21\u3002Achronix Semiconductor \u603b\u88c1\u517c\u9996\u5e2d\u6267\u884c\u5b98Robert Blake\u8868\u793a\u5bf9\u4e8eFPGA\u8fd1\u5e74\u7684\u5e02\u573a\u589e\u957f\u975e\u5e38\u5174\u594b\uff0c\u76f8\u4fe1\u5728\u5e9e\u5927\u9ad8\u901f\u589e\u957f\u7684\u5e02\u573a\u4e2d\u65b0\u4ea7\u54c1\u5c06\u6709\u51fa\u8272\u7684\u8868\u73b0\u3002<\/span><\/p>\n

\n\t <\/div>\n

\n\t\u636e\u7edf\u8ba1\uff0c\u7ea6\u670925%\u7684\u4f01\u4e1a\u9009\u62e9\u5165\u5c40AI\/ML\u4ee5\u4fdd\u6301\u4f01\u4e1a\u81ea\u8eab\u7684\u7ade\u4e89\u529b\uff0c\u672a\u6765\u4e24\u5e74\u5185\uff0c\u5c06\u4f1a\u6709\u63a5\u8fd1\u56db\u5206\u4e4b\u4e09\u7684\u4f01\u4e1a\u4f1a\u5e03\u5c40AI\u3002\u800cAI\u65b9\u9762\uff0c\u7b97\u6cd5\u4ecd\u5728\u4e0d\u65ad\u6f14\u8fdb\uff0c\u6570\u503c\u7cbe\u5ea6\u9009\u62e9\u8d8a\u6765\u8d8a\u591a\u6837\u6027\uff0c\u4f46\u4ec5\u4f9d\u8d56\u6570\u636e\u683c\u5f0f\u7684\u8f6c\u53d8\u964d\u4f4e\u80fd\u8017\u7684\u65b9\u6cd5\u5df2\u63a5\u8fd1\u74f6\u9888\uff0c\u5e02\u573a\u9700\u8981\u66f4\u5177\u6709\u9ad8\u6548\u8ba1\u7b97\u529b\u3001\u9ad8\u6548\u5927\u5e26\u5bbd\u7684\u6570\u636e\u8fd0\u9001\u80fd\u529b\u3001\u4e30\u5bcc\u50a8\u7f13\u5b58\u80fd\u529b\u7684\u6700\u9ad8\u80fd\u6548\u6bd4\u7684\u5e7f\u9002\u5e94\u6027\u5e73\u53f0\u3002<\/p>\n

\n\t5\u670822\u65e5\uff0cAchronix\u5ba3\u5e03\u63a8\u51fa\u5168\u65b0\u7684 “FPGA+”\u7cfb\u5217\u4ea7\u54c1Speedste<\/u>r7t FPGA\uff0c\u8be5\u4ea7\u54c1\u91c7\u7528\u53f0\u79ef\u7535\uff08TSMC\uff097nm FinFET\u5de5\u827a\u6253\u9020\u3002\u636e\u4ecb\u7ecd\uff0c\u8be5\u4ea7\u54c1\u5c06FPGA\u4e0eASIC<\/u>\u6280\u672f\u878d\u5408\uff0c\u517c\u987e\u4e86\u4e24\u8005\u7684\u4f18\u70b9\u3002<\/p>\n

\n\t\u9664\u6b64\u4e4b\u5916\uff0cSpeedster7t FPGA\u5177\u6709\u9769\u547d\u6027\u7684\u65b0\u578b\u4e8c\u7ef4\u7247\u4e0a\u7f51\u7edc\uff082D NoC\uff09\u548c\u4e00\u7cfb\u5217\u9488\u5bf9\u9ad8\u5e26\u5bbd\u548c\u4eba\u5de5\u667a\u80fd\/\u673a\u5668\u5b66\u4e60<\/u>\uff08AI \/ ML\uff09\u5e94\u7528\u8fdb\u884c\u4e86\u4f18\u5316\u7684\u65b0\u578b\u673a\u5668\u5b66\u4e60\u5904\u7406\u5668\uff08MLP\uff09\u3002\u53e6\u5916\uff0c\u503c\u5f97\u4e00\u63d0\u7684\u662f\uff0cSpeedster7t FPGA\u8fd8\u5177\u6709\u6ee1\u8db3\u672a\u6765AI\/ML\u9700\u6c42\u6240\u9700\u7684\u8d85\u9ad8\u5e26\u5bbd\u63a5\u53e3\uff0c\u5305\u62ec400G\u4ee5\u592a\u7f51<\/u>\u7aef\u53e3\u3001\u7528\u4e8e\u6570\u636e\u4f20\u8f93\u7684PCI Express Gen5\u7aef\u53e3\u4ee5\u53ca\u7528\u4e8e\u4e1a\u754c\u6700\u7075\u6d3b\u3001\u4f4e\u6210\u672c\u3001\u9ad8\u5e26\u5bbd\u5b58\u50a8\u7684GDDR6\u63a7\u5236\u5668\u3002<\/p>\n

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\n\t\"FPGA\u96be\u4ee5\u903e\u8d8a\u7684\u74f6\u9888\u7a76\u7adf\u8be5\u5982\u4f55\u7a81\u7834\"<\/p>\n

\n\tBlake\u8868\u793a\uff1a“\u6211\u4eec\u6b63\u5904\u4e8e\u667a\u80fd\u5316\u3001\u81ea\u5b66\u4e60\u8ba1\u7b97\u7684\u9ad8\u589e\u957f\u9636\u6bb5\u7684\u65e9\u671f\uff0c\u8fd9\u79cd\u8ba1\u7b97\u5c06\u5e7f\u6cdb\u5f71\u54cd\u6211\u4eec\u65e5\u7684\u5e38\u751f\u6d3b\u3002” Semico Research\u516c\u53f8ASIC\u548cSoC\u9996\u5e2d\u5e02\u573a\u5206\u6790\u5e08Rich Wawrzyniak\u8868\u793a\uff1a“\u5168\u65b0\u7684\u7cfb\u5217\u4ea7\u54c1\u662f\u521b\u65b0\u6027\u82af\u7247\u67b6\u6784\u5b9e\u73b0\u7206\u53d1\u7684\u4e00\u4e2a\u5353\u8d8a\u6848\u4f8b\uff0c\u521b\u9020\u8be5\u67b6\u6784\u7684\u76ee\u7684\u662f\u76f4\u63a5\u9762\u5411AI\u5e94\u7528\u5904\u7406\u5927\u91cf\u7684\u6570\u636e\u3002”<\/p>\n

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\n\tSpeedster7t FPGA\u7cfb\u5217\u4ea7\u54c1\u6b63\u662f\u5c06\u4e8c\u8005\u76f8\u878d\u5408\uff0c\u5229\u7528\u53f0\u79ef\u7535\uff08TSMC\uff097nm\u6280\u672f\uff0c\u6784\u5efa\u51fa\u5168\u65b0\u7684\u5177\u6709\u9ad8\u6027\u80fd\u3001\u4f4e\u529f\u8017\u3001\u9ad8\u7075\u6d3b\u6027\u3001\u9ad8\u9002\u5e94\u6027\u7684FPGA+\u3002<\/p>\n

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\n\t\"FPGA\u96be\u4ee5\u903e\u8d8a\u7684\u74f6\u9888\u7a76\u7adf\u8be5\u5982\u4f55\u7a81\u7834\"<\/p>\n

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\n\t\u4f20\u7edfFPGA\u4f7f\u7528DSP<\/u>\u6a21\u5757\u6709\u7740\u76f8\u5bf9\u6709\u9650\u7684\u8868\u73b0\u529b\uff0c\u5177\u4f53\u8868\u73b0\u5728\u4e0d\u9ad8\u6548\u7684\u6570\u503c\u7cbe\u5ea6\u652f\u6301\u3001\u9700\u8981\u6d88\u8017\u989d\u5916\u903b\u8f91\u548cMemory\u8d44\u6e90\u3001\u6027\u80fd\u53d7\u9650\u4e8eFPGA\u5e03\u7ebf<\/u>\u3002<\/span><\/p>\n

\n\tSpeedster7t FPGA\u642d\u8f7d\u5168\u65b0\u7684\u673a\u5668\u5b66\u4e60\u5904\u7406\u5668\uff08MLP\uff09\uff0c\u5c06\u8ba1\u7b97\u3001\u5b58\u50a8\u548c\u7a0b\u5e8f\u96c6\u4e8e\u4e00\u8eab\uff0c\u4f7f\u5176\u652f\u6301\u9635\u5217\u5f0f\u4e58\u7d2f\u79ef\u8ba1\u7b97\u67b6\u6784\u3001\u5185\u5d4c\u7f13\u5b58\u3001\u53ef\u914d\u7f6e\u4ee5\u652f\u6301\u6f14\u8fdb\u4e2d\u7b97\u6cd5\u3001\u652f\u6301\u5e7f\u6cdb\u5404\u79cd\u4e0d\u540c\u6574\u70b9\u548c\u6d6e\u70b9\u683c\u5f0f\u3002\u5927\u89c4\u6a21\u7684\u53ef\u7f16\u7a0b\u8ba1\u7b97\u5355\u5143\u5e73\u884c\u9635\u5217\u662f\u5176\u6838\u5fc3\uff0c\u53ef\u63d0\u4f9b\u4e1a\u754c\u6700\u9ad8\u7684\u3001\u57fa\u4e8eFPGA\u7684\u8ba1\u7b97\u5bc6\u5ea6\uff0c\u53e6\u5916\uff0c\u4e5f\u5177\u6709\u6700\u9ad8\u7684\u80fd\u6548\u6bd4\u3002<\/p>\n

\n\tMLP\u662f\u9ad8\u5ea6\u53ef\u914d\u7f6e\u7684\u3001\u8ba1\u7b97\u5bc6\u96c6\u578b\u7684\u5355\u5143\u6a21\u5757\uff0c\u53ef\u652f\u63014\u523024\u4f4d\u7684\u6574\u70b9\u683c\u5f0f\u548c\u9ad8\u6548\u7684\u6d6e\u70b9\u6a21\u5f0f\uff0c\u5305\u62ec\u5bf9TensorFlow<\/u>\u768416\u4f4d\u683c\u5f0f\u7684\u652f\u6301\uff0c\u4ee5\u53ca\u53ef\u4f7f\u6bcf\u4e2aMLP\u7684\u8ba1\u7b97\u5f15\u64ce\u52a0\u500d\u7684\u589e\u538b\u5757\u6d6e\u70b9\u683c\u5f0f\u7684\u76f4\u63a5\u652f\u6301\u3002<\/p>\n

\n\tMLP\u4e0e\u5d4c\u5165\u5f0f\u5b58\u50a8\u5668\u6a21\u5757\u7d27\u5bc6\u76f8\u90bb\uff0c\u901a\u8fc7\u6d88\u9664\u4f20\u7edf\u8bbe\u8ba1\u4e2d\u4e0eFPGA\u5e03\u7ebf\u76f8\u5173\u7684\u5ef6\u8fdf\uff0c\u6765\u786e\u4fdd\u4ee5750 MHz\u7684\u6700\u9ad8\u6027\u80fd\u5c06\u6570\u636e\u4f20\u9001\u5230MLP\u3002\u8fd9\u79cd\u9ad8\u5bc6\u5ea6\u8ba1\u7b97\u548c\u9ad8\u6027\u80fd\u6570\u636e\u4f20\u8f93\u7684\u7ed3\u5408\u4f7f\u5f97\u5904\u7406\u5668\u903b\u8f91\u9635\u5217\u80fd\u591f\u63d0\u4f9b\u57fa\u4e8eFPGA\u7684\u6700\u9ad8\u53ef\u7528\u8ba1\u7b97\u80fd\u529b\u4ee5\u6bcf\u79d2\u4e07\u4ebf\u6b21\u8fd0\u7b97\u6570\u91cf\u4e3a\u5355\u4f4d\uff08TOPS\uff0cTera-Operati<\/u>ons Per Second\uff09\u3002<\/p>\n

\n\t\u9ad8\u6027\u80fd\u8ba1\u7b97\u548c\u673a\u5668\u5b66\u4e60\u7cfb\u7edf\u7684\u5173\u952e\u4e4b\u5904\u662f\u9ad8\u7247\u5916\u5b58\u50a8\u5668\u5e26\u5bbd\uff0c\u4ece\u800c\u4e3a\u591a\u4e2a\u6570\u636e\u6d41\u63d0\u4f9b\u5b58\u50a8\u6e90\u548c\u7f13\u51b2\u3002 Speedster7t\u5668\u4ef6\u662f\u552f\u4e00\u652f\u6301GDDR6\u5b58\u50a8\u5668\u7684FPGA\uff0c\u8be5\u7c7b\u5b58\u50a8\u5668\u662f\u5177\u6709\u6700\u9ad8\u5e26\u5bbd\u7684\u5916\u90e8\u5b58\u50a8\u5668\u4ef6\u3002\u6bcf\u4e2aGDDR6\u5b58\u50a8\u63a7\u5236\u5668\u90fd\u80fd\u591f\u652f\u6301512 Gbps\u7684\u5e26\u5bbd\uff0cSpeedster7t\u5668\u4ef6\u4e2d\u6709\u591a\u8fbe8\u4e2aGDDR6\u63a7\u5236\u5668\uff0c\u53ef\u4ee5\u652f\u63014 Tbps\u7684GDDR6\u7d2f\u52a0\u5e26\u5bbd\uff0c\u5e76\u4e14\u4ee5\u5f88\u5c0f\u7684\u6210\u672c\u5c31\u53ef\u63d0\u4f9b\u4e0e\u57fa\u4e8eHBM\u7684FPGA\u7b49\u6548\u5b58\u50a8\u5e26\u5bbd\u3002<\/span><\/p>\n

\n\t“\u7f8e\u5149\uff08Micron\uff09\u4e50\u4e8e\u643a\u624bAchronix\u53bb\u5b9e\u73b0\u5168\u7403\u7b2c\u4e00\u4e2a\u9762\u5411\u9ad8\u5e26\u5bbd\u5b58\u50a8\u9700\u6c42\u800c\u76f4\u63a5\u52a0\u8f7d\u4e86GDDR6\u7684FPGA\u4ea7\u54c1\uff0c”\u7f8e\u5149\u8ba1\u7b97\u4e0e\u8054\u7f51\u4e1a\u52a1\u90e8\u8425\u9500\u526f\u603b\u88c1Mal Humphrey\u3002“\u50cf\u8fd9\u6837\u7684\u521b\u65b0\u7684\u548c\u53ef\u6269\u5c55\u7684\u89e3\u51b3\u65b9\u6848\u5c06\u63a8\u52a8\u4eba\u5de5\u667a\u80fd\u9886\u57df\u5185\u7684\u5dee\u5f02\u5316\uff0c\u5176\u4e2d\u5f02\u6784\u8ba1\u7b97\u53ef\u9009\u65b9\u6848\u4e0e\u9ad8\u6027\u80fd\u7684\u5b58\u50a8\u662f\u52a0\u901f\u83b7\u5f97\u6570\u636e\u5185\u6db5\u7684\u5fc5\u9700\u90e8\u5206\u3002”<\/p>\n

\n\t\u975e\u51e1\u7684\u5b58\u50a8\u5e26\u5bbd\u9700\u8981\u597d\u7684“\u540e\u536b”\u624d\u80fd\u771f\u6b63\u53d1\u6325\u51fa\u5176\u6027\u80fd\u3002Speedster7t\u5668\u4ef6\u5305\u62ec\u4e1a\u754c\u6700\u9ad8\u6027\u80fd\u7684\u63a5\u53e3\u7aef\u53e3\uff0c\u4ee5\u652f\u6301\u6781\u9ad8\u5e26\u5bbd\u7684\u6570\u636e\u6d41\u3002<\/span><\/p>\n

\n\tSpeedster7t\u5668\u4ef6\u62e5\u6709\u591a\u8fbe72\u4e2a\u4e1a\u754c\u6700\u9ad8\u6027\u80fd\u7684SerDes\uff0c\u53ef\u4ee5\u8fbe\u52301\u5230112 Gbps\u7684\u901f\u5ea6\u3002\u8fd8\u6709\u5e26\u6709\u524d\u5411\u7ea0\u9519\uff08FEC\uff09\u7684\u786c\u4ef6400G\u4ee5\u592a\u7f51MAC\uff0c\u652f\u63014x 100G\u548c8x 50G\u7684\u914d\u7f6e\uff0c\u4ee5\u53ca\u6bcf\u4e2a\u63a7\u5236\u5668\u67098\u4e2a\u621616\u4e2a\u901a\u9053\u7684\u786c\u4ef6PCI Express Gen5\u63a7\u5236\u5668\u3002<\/p>\n

\n\tSpeedster7t FPGA\u5668\u4ef6\u7684\u5927\u5c0f\u8303\u56f4\u4e3a\u4ece363K\u81f32.6M \u76846\u8f93\u5165\u67e5\u627e\u8868\uff08LUT\uff09\uff0c\u65e0\u8bba\u662f\u4f4e\u6210\u672c\u5ba2\u6237\u8fd8\u662f\u9ad8\u7aef\u5ba2\u6237\uff0c\u5747\u53ef\u6ee1\u8db3\u3002\u800cFPGA+\u5982\u6b64\u4f17\u591a\u7684\u4f18\u70b9\u4e5f\u53ef“\u968f\u610f\u9a70\u9a8b”\u5728AI\u3001\u56fe\u50cf\u5904\u7406\u3001\u8bed\u8a00\u5904\u7406\u3001Database\u52a0\u901f\u3001\u52a0\u5bc6\u7b97\u6cd5\u3001\u7f51\u7edc\u5904\u7406\u65b9\u6848\u4e0a\u3002<\/span><\/p>\n

\n\t\"FPGA\u96be\u4ee5\u903e\u8d8a\u7684\u74f6\u9888\u7a76\u7adf\u8be5\u5982\u4f55\u7a81\u7834\"<\/p>\n

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