{"id":1883,"date":"2018-12-21T03:32:07","date_gmt":"2018-12-21T03:32:07","guid":{"rendered":""},"modified":"2018-12-21T11:33:05","modified_gmt":"2018-12-21T03:33:05","slug":"vivado+fpga%e8%ae%be%e8%ae%a1%e5%9f%ba%e7%a1%80%e6%93%8d%e4%bd%9c%e6%b5%81%e7%a8%8b%3avivado%e7%9a%84%e5%9f%ba%e6%9c%ac%e4%bd%bf%e7%94%a8","status":"publish","type":"post","link":"http:\/\/www.szryc.com\/?p=1883","title":{"rendered":"Vivado FPGA\u8bbe\u8ba1\u57fa\u7840\u64cd\u4f5c\u6d41\u7a0b:Vivado\u7684\u57fa\u672c\u4f7f\u7528"},"content":{"rendered":"

\n\tVivado FPGA<\/u>\u8bbe\u8ba1\u57fa\u7840\u64cd\u4f5c\u6d41\u7a0b<\/p>\n

\n\t\u5f53\u7136\u5728\u4ecb\u7ecd\u7684\u8fc7\u7a0b\u5f53\u4e2d\u4f1a\u7ed9\u5927\u5bb6\u63a8\u8350\u4e00\u4e9b\u5bf9\u4e8e\u5de5\u5177\u6df1\u5165\u4f7f\u7528\u7684Xilinx\u5b98\u7f51\u8d44\u6599\u3002\u8fd9\u91cc\u4ee5\u6d41\u6c34\u706f\u7684\u63a7\u5236\u4e3a\u4f8b\u3002<\/p>\n

\n\t <\/div>\n

\n\tVivado\u7684\u57fa\u672c\u4f7f\u7528<\/p>\n

\n\t(\u4e00) \u6253\u5f00Vivado\u65b0\u5efa\u5de5\u7a0b\uff1a<\/p>\n

\n\t1. \u5b89\u88c5\u597dVivado\u4e4b\u540e\uff0c\u5728Windows\u7cfb\u7edf Start > All Programs<\/u> > Xilinx Design Tools > Vivado> Vivado \uff0c\u6216\u8005\u684c\u9762\u4e0a\u627e\u5230\u5982\u4e0b\u56fe\u6807\uff0c\u70b9\u51fb\u6253\u5f00Vivado\u3002<\/p>\n

\n\t<\/p>\n

\n\t2. \u70b9\u51fbCreate<\/u> Project<\/p>\n

\n\t<\/p>\n

\n\t3. \u6307\u5b9a\u5de5\u7a0b\u6240\u653e\u8def\u5f84\u4e0e\u5de5\u7a0b\u540d\u5b57<\/p>\n

\n\t<\/p>\n

\n\t4. \u9009\u62e9RTL Project \uff0c\u6b64\u65f6\u628aDo not specify at this ti<\/u>me\u52fe\u4e0a\uff0c\u8868\u793a\u5728\u65b0\u5efa\u5de5\u7a0b\u65f6\u4e0d\u53bb\u6307\u5b9a\u6e90\u6587\u4ef6\u3002<\/p>\n

\n\t<\/p>\n

\n\t5. \u9009\u62e9\u5668\u4ef6\u6216\u8005\u677f\u5361\u3002Parts\u8868\u793a\u5668\u4ef6\uff0c\u5f53\u7136\u5982\u679c\u662f\u677f\u5361\u5c31\u70b9\u51fbBoards\u3002\u5668\u4ef6\u53ef\u4ee5\u6839\u636e\u7cfb\u5217\u53bb\u9009\uff0c\u4e5f\u53ef\u4ee5\u76f4\u63a5\u5728Search\u680f\u641c\u7d22\u5668\u4ef6\u578b\u53f7\u3002\u5668\u4ef6\u7684\u9009\u62e9\u6839\u636e\u4f60\u7684FPGA\u82af\u7247\u6765\u5b9a\uff0c\u4e00\u822c\u5728\u4f60\u6240\u7528\u7684\u5f00\u53d1\u677f\u624b\u518c\u91cc\u9762\u53ef\u4ee5\u627e\u5230\u3002\u9009\u62e9\u5b8c\u6bd5\u70b9\u51fbNext\u3002<\/p>\n

\n\t<\/p>\n

\n\t6. \u786e\u8ba4\u6574\u4e2a\u5de5\u7a0b\u4fe1\u606f\u540e\uff0c\u70b9\u51fbFinish\uff0c\u5b8c\u6210\u5de5\u7a0b\u521b\u5efa\u3002<\/p>\n

\n\t<\/p>\n

\n\t\uff08\u4e8c\uff09\u65b0\u5efaVerilog<\/u>\u6587\u4ef6\uff1a<\/p>\n

\n\t1. \u5728Flow Navigator\u754c\u4e0b\u70b9\u51fb Add Sources.<\/p>\n

\n\t<\/p>\n

\n\t2. \u5982\u4e0b\u754c\u9762\uff0c\u7b2c\u4e00\u4e2a\u662f\u6dfb\u52a0\u6216\u8005\u65b0\u5efaXDC\u7ea6\u675f\u6587\u4ef6\uff1b\u7b2c\u4e8c\u4e2a\u662f\u6dfb\u52a0\u6216\u8005\u65b0\u5efa\u8bbe\u8ba1\u6587\u4ef6\uff1b\u7b2c\u4e09\u4e2a\u662f\u6dfb\u52a0\u6216\u8005\u65b0\u5efa\u4eff\u771f\u6587\u4ef6\u3002\u8fd9\u91cc\u9009\u62e9\u6dfb\u52a0\u6216\u8005\u65b0\u5efa\u8bbe\u8ba1\u6587\u4ef6\uff0c\u518d\u70b9\u51fbNext\u3002<\/p>\n

\n\t<\/p>\n

\n\t3. \u8fd9\u91cc\u70b9\u51fbCreate File\u3002Add Files\u8868\u793a\u6dfb\u52a0\u5df2\u6709\u7684\u8bbe\u8ba1\u6587\u4ef6\uff0cAdd Directories\u8868\u793a\u6dfb\u52a0\u6587\u4ef6\u5939\u3002<\/p>\n

\n\t<\/p>\n

\n\t4. \u6307\u5b9a\u6587\u4ef6\u540d\u4e0e\u8def\u5f84\uff08\u9ed8\u8ba4\u5b58\u653e\u5728\u5de5\u7a0b\u9ed8\u8ba4\u8def\u5f84\uff09\uff0c\u6587\u4ef6\u7c7b\u578b\uff08File type\uff09\u9009\u62e9\u4e3aVerilog\uff0c\u5982\u679c\u4f60\u7528\u7684\u662f\u5176\u5b83\u786c\u4ef6\u63cf\u8ff0\u8bed\u8a00\uff0c\u5219\u9009\u62e9\u4f60\u7528\u7684\u8bed\u8a00\u7c7b\u578b\u3002<\/p>\n

\n\t<\/p>\n

\n\t5. \u5728\u4e4b\u540e\u8df3\u51fa\u7684\u6846\u4f9d\u6b21\u70b9\u51fbOK\uff0cFinish\uff0cYes\u3002\u8fd9\u5c31\u5b8c\u6210\u4e86\u4e00\u4e2a\u8bbe\u8ba1\u6587\u4ef6\u7684\u65b0\u5efa\u3002<\/p>\n

\n\t6. \u5728Source\u6846\u53cc\u51fb\u521a\u521a\u65b0\u5efa\u7684\u6587\u4ef6\uff0c\u5b8c\u6210\u4f60\u7684Verilog\u4ee3\u7801\u8bbe\u8ba1\uff0c\u5e76\u4fdd\u5b58\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u91cd\u590d\u4e0a\u8ff0\u64cd\u4f5c\u5b8c\u6210\u5bf9clk_gen.v\uff08\u5206\u9891\u6a21\u5757\uff09\u548cled_top.v(\u9876\u5c42\u6a21\u5757)\u6587\u4ef6\u7684\u8bbe\u8ba1\u4e0e\u7f16\u7801\u3002<\/p>\n

\n\t<\/p>\n

\n\t<\/p>\n

\n\t(\u4e09) \u67e5\u770b Schematic:<\/p>\n

\n\t1. \u5728Flow Navigator \u4e0b\u70b9\u51fbRTL ANALYSIS -> Open Elaborated Design -> Schematic<\/p>\n

\n\t<\/p>\n

\n\t2. \u4e00\u4f1a\u513f\u5c31\u4f1a\u5f39\u51fa\u4f60\u6240\u8bbe\u8ba1\u7684Verilog\u7684\u539f\u7406\u56fe\u3002\u70b9\u51fb\u539f\u7406\u56fe\u91cc\u6a21\u5757\u4e0a\u7684+\u53f7\uff0c\u53ef\u4ee5\u5c06\u6b64\u6a21\u5757\u7684\u5185\u90e8\u7535\u8def\u5c55\u5f00\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u5927\u5bb6\u53ef\u4ee5\u53c2\u8003\u5b98\u7f51\u6587\u6863 "Vivado Design Suite User Guide: Using the Vivado IDE (UG893)"\u53bb\u8fdb\u4e00\u6b65\u4e86\u89e3Schematic\u7684\u4f7f\u7528\u3002<\/p>\n

\n\t\uff08\u56db\uff09\u6dfb\u52a0TB\u6587\u4ef6\uff0c\u505a\u529f\u80fd\u4eff\u771f\uff1a<\/p>\n

\n\t\u5728\u5b8c\u6210RTL\u8bbe\u8ba1\u4e4b\u540e\uff0c\u6211\u4eec\u5148\u9700\u8981\u5bf9\u5176\u505a\u4eff\u771f\u6765\u9a8c\u8bc1\u5176\u529f\u80fd\u7684\u6b63\u786e\u6027\u3002\u8fd9\u91cc\u5148\u9700\u8981\u6dfb\u52a0testbench\u6587\u4ef6\uff0c\u6765\u7ed9\u8bbe\u8ba1\u8f93\u5165\u6d4b\u8bd5\u6fc0\u52b1\u3002<\/p>\n

\n\t1. \u6dfb\u52a0testbench\u6587\u4ef6\u3002\u5728Flow Navigator\u754c\u9762\u4e0b\u70b9\u51fb Add Sources -> Add or create simulation sources -> Create File\uff0c\u5219\u4f1a\u51fa\u73b0\u5982\u4e0b\u754c\u9762\uff0c\u9009\u5b9a\u6587\u4ef6\u540d\uff08File name\uff09,\u6587\u4ef6\u7c7b\u578b\uff08File type\uff09\u3002\u63a5\u4e0b\u6765\u4f9d\u6b21\u70b9\u51fbOK\uff0cFinish, OK\u5b8c\u6210\u6587\u4ef6\u7684\u521b\u5efa\u3002<\/p>\n

\n\t<\/p>\n

\n\t2. \u5728Sources\u6846\u627e\u5230\u521a\u65b0\u5efa\u7684tb\u6587\u4ef6\uff0c\u53cc\u51fb\u8fdb\u884c\u7f16\u8f91\uff0c\u5b8c\u6210\u7f16\u8f91\u540e\u4fdd\u5b58\u3002\u7f16\u8f91\u5b8c\u6bd5\uff0c\u5219\u5982\u4e0b\u56fe\u6240\u793a\u3002<\/p>\n

\n\t<\/p>\n

\n\t3. \u5728Flow Navigator\u754c\u9762\u4e0b\u70b9\u51fb Run Simulation -> Run Behavioral Simultion\u3002\u5982\u679c\u4ee3\u7801\u6ca1\u6709\u9519\u8bef\uff0c\u5219\u4e00\u4f1a\u513f\u5c06\u4f1a\u5728\u53f3\u8fb9\u51fa\u73b0\u5982\u4e0b\u56fe\u6240\u793a\u7684\u6ce2\u5f62\u7a97\u53e3\u3002<\/p>\n

\n\t<\/p>\n

\n\t4.  \u5728Scope\u6846\u91cc\uff0c\u9009\u62e9\u6a21\u5757\uff0c\u5176\u5185\u90e8\u4fe1\u53f7\u663e\u793a\u5728\u5176\u53f3\u8fb9\u7684Objects\u6846\u91cc\uff0c\u53ef\u4ee5\u53f3\u51fb\u9009\u62e9Add to wave window,\u5c06\u5176\u6dfb\u52a0\u5230\u6ce2\u5f62\u663e\u793a\u7a97\u53e3\u3002\u754c\u9762\u6700\u4e0a\u65b9\u7ea2\u6846\u6846\u51fa\u6765\u7684\u51e0\u4e2a\u6309\u94ae\u4ece\u6700\u5de6\u8fb9\u5230\u53f3\u8fb9\u4e09\u4e2a\u5206\u522b\u662f “\u4ece\u65b0\u5f00\u59cb\u8fd0\u884c\u4eff\u771f”, “\u4e00\u76f4\u8fd0\u884c\u4eff\u771f”\uff0c“\u8fd0\u884c\u8bbe\u5b9a\u65f6\u95f4\u957f\u5ea6\u7684\u4eff\u771f\uff08\u5982\u56fe\u8bbe\u5b9a\u7684\u65f6\u95f4\u4e3a1us\uff09”\u3002\u6bcf\u65b0\u6dfb\u52a0\u4fe1\u53f7\u540e\u90fd\u9700\u8981\u4ece\u65b0\u8fd0\u884c\u4eff\u771f\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u8fd0\u884c\u4eff\u771f\u662f\u4e3a\u4e86\u786e\u8ba4RTL\u8bbe\u8ba1\u7684\u529f\u80fd\u7684\u6b63\u786e\u6027\uff0c\u5bf9\u4e8e\u4eff\u771f\u7684\u6df1\u5165\u4e86\u89e3\u53ef\u4ee5\u53c2\u9605\u5b98\u7f51\u8d44\u6599“Vivado Design Suite User Guide: Logic Simulation (UG900) ” \u548c “Vivado Design Suite Tutorial: Logic Simulation (UG937)”\u3002<\/p>\n

\n\t(\u516d)   \u6dfb\u52a0\u7ba1\u811a\u7ea6\u675f<\/p>\n

\n\t\u6dfb\u52a0\u7ba1\u811a\u7ea6\u675f\uff0c\u6dfb\u52a0\u7ba1\u811a\u7ea6\u675f\u53ef\u4ee5\u9009\u7528XDC\u6587\u4ef6\u7684\u65b9\u5f0f\uff08\u53c2\u8003\u5b98\u65b9\u6587\u6863 “Vivado Design Suite User Guide Using Constrai<\/u>nts (UG903 )”\uff09\uff0c\u4e5f\u53ef\u4ee5\u91c7\u7528\u754c\u9762\u5316\u7684\u65b9\u5f0f\u3002\u8fd9\u91cc\u7ed9\u5927\u5bb6\u4ecb\u7ecd\u754c\u9762\u5316\u7684\u65b9\u5f0f\u3002<\/p>\n

\n\t\uff08\u4e94\uff09Synthesis(\u7efc\u5408)<\/p>\n

\n\t\u76f4\u63a5\u5728Flow Navigator\u754c\u9762\u4e0b\u70b9\u51fb Run Synthesis\u540e\u70b9\u51fbOK\u5373\u53ef\u3002<\/p>\n

\n\t<\/p>\n

\n\tSynthesis\u5b8c\u6bd5\u540e\u5c31\u4f1a\u8df3\u51fa\u5982\u4e0b\u4fe1\u606f\u6846\u3002\u9009\u62e9Open Synthesized Design\u540e\u70b9\u51fbOK\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u5bf9\u4e8eSynthesis\u7684\u5176\u5b83\u4e00\u4e9b\u8bbe\u7f6e\u9009\u9879\u7b49\u7b49\uff0c\u5927\u5bb6\u53ef\u4ee5\u53c2\u8003\u5b98\u7f51\u6587\u6863 “Vivado Design Suite User Guide:Synthesis (UG901)”\u3002<\/p>\n

\n\t(\u516d)   \u6dfb\u52a0\u7ba1\u811a\u7ea6\u675f<\/p>\n

\n\t\u6dfb\u52a0\u7ba1\u811a\u7ea6\u675f\uff0c\u6dfb\u52a0\u7ba1\u811a\u7ea6\u675f\u53ef\u4ee5\u9009\u7528XDC\u6587\u4ef6\u7684\u65b9\u5f0f\uff08\u53c2\u8003\u5b98\u65b9\u6587\u6863 “Vivado Design Suite User Guide Using Constraints (UG903 )”\uff09\uff0c\u4e5f\u53ef\u4ee5\u91c7\u7528\u754c\u9762\u5316\u7684\u65b9\u5f0f\u3002\u8fd9\u91cc\u7ed9\u5927\u5bb6\u4ecb\u7ecd\u754c\u9762\u5316\u7684\u65b9\u5f0f\u3002\u7ba1\u811a\u7ea6\u675f\u662f\u4e3a\u4e86\u5c06\u8bbe\u8ba1\u7684\u8f93\u5165\u8f93\u51fa\u5f15\u811a\u6620\u5c04\u5230FPGA\u82af\u7247\u7684\u5f15\u811a\u4e0a\u3002<\/p>\n

\n\t1. Synthesis\u7ed3\u675f\u4e4b\u540e\uff0c\u5e76\u4e14Open Synthesized Design\u4e4b\u540e\u3002\u5728\u754c\u9762\u53f3\u4e0a\u89d2\u9009\u62e9I\/O Planning<\/p>\n

\n\t<\/p>\n

\n\t2. \u4e4b\u540e\u5728I\/O Ports\u7ed9I\/O\u7aef\u53e3\u5206\u914d\u5f15\u811a\u3002Package Pi<\/u>n\u5c31\u662f\u5bf9\u5e94\u7684FPGA\u82af\u7247\u7684\u5f15\u811a\u3002\u5176\u4e2dclk\u63a5\u5916\u90e8\u6676\u632f\u8f93\u5165\uff0crts_n\u63a5\u5916\u90e8\u590d\u4f4d\u6309\u94ae\uff0cled_o\u63a5led\u706f\u3002<\/p>\n

\n\t<\/p>\n

\n\t\uff08\u4e03\uff09Implementation(\u5b9e\u73b0)<\/p>\n

\n\t\u5f15\u811a\u5206\u914d\u5b8c\u6bd5\u4e4b\u540e,\u5728Flow Navigator\u754c\u9762\u4e0b\u70b9\u51fbRun Implementation<\/p>\n

\n\t<\/p>\n

\n\tImplementation\u5b8c\u6bd5\u4e4b\u540e\u4f1a\u51fa\u73b0\u5982\u4e0b\u5f39\u6846\u3002\u70b9\u51fbOK\u5219\u4f1a\u6253\u5f00Implementation\u4e4b\u540e\u7684\u8bbe\u8ba1\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u5bf9\u4e8eImplementation\u7684\u5176\u5b83\u4e00\u4e9b\u8bbe\u7f6e\u9009\u9879\u7b49\u7b49\uff0c\u5927\u5bb6\u53ef\u4ee5\u53c2\u8003\u5b98\u7f51\u6587\u6863 "Vivado Design Suite User Guide: Implementation (UG904)"\u3002<\/p>\n

\n\t(\u516b) \u751f\u6210\u7f16\u7a0b\u6587\u4ef6\uff0c\u4e0a\u677f\u6d4b\u8bd5<\/p>\n

\n\tImplementation\u4e4b\u540e\u5728Flow Navigator\u754c\u9762\u4e0b\u70b9\u51fbGenerate Bitstream<\/p>\n

\n\t<\/p>\n

\n\t\u9ed8\u8ba4\u751f\u6210\u7684\u4e3a.bit\u6587\u4ef6\u3002\u5bf9\u4e8e\u8fd9\u4e00\u5757\u7684\u5176\u4ed6\u4e00\u4e9b\u8bbe\u7f6e\u5927\u5bb6\u53ef\u4ee5\u53c2\u8003\u5b98\u7f51\u8d44\u6599 “Vivado Design Suite User Guide: Program<\/u>ming and Debugging (UG908)”\u3002<\/p>\n

\n\tBitstream\u6587\u4ef6\u751f\u6210\u5b8c\u6bd5\u4e4b\u540e\uff0c\u51fa\u73b0\u5982\u4e0b\u5f39\u6846\u3002\u63a5\u4e0b\u6765\u9009\u62e9Open Hardware Manager,\u70b9\u51fbOK\u3002\u51c6\u5907\u4e0a\u73ed\u6d4b\u8bd5\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u6709\u4e9b\u5f00\u53d1\u677f\u652f\u6301SD\u914d\u7f6e\uff0c\u5219\u76f4\u63a5\u5c06\u751f\u6210\u7684.bit\u6587\u4ef6\u62f7\u5230\u5bf9\u5e94\u7684SD\u5361\u91cc\u9762\u5373\u53ef\u3002<\/p>\n

\n\t\u5982\u679c\u6709Xilinx\u4e0b\u8f7d\u5668\uff0c\u5c06Xilinx\u4e0b\u8f7d\u5668\uff0c\u5f00\u53d1\u677f\u5b50\uff0c\u7535\u8111\u8fde\u63a5\u597d\uff0c\u5e76\u4e0a\u7535\u3002<\/p>\n

\n\t\u5982\u4e0b\u6240\u793a\uff0c\u70b9\u51fbOpen Target -> Auto Connect<\/p>\n

\n\t<\/p>\n

\n\t\u5de5\u5177\u81ea\u52a8\u641c\u7d22\u5df2\u8fde\u63a5\u7684\u5668\u4ef6\u3002\u4e00\u822c\u7b2c\u4e00\u6b21\u4f1a\u8fde\u63a5\u5931\u8d25\uff0c\u51fa\u73b0\u5982\u4e0b\u56fe\u6240\u793a\u60c5\u51b5\u3002\u53f3\u51fb\u7ea2\u8272\u7bad\u5934\u6240\u6307\uff0c\u518d\u70b9\u51fbClose Server\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u4e4b\u540e\u518d\u91cd\u590dOpen Target -> Auto Connect\u64cd\u4f5c\uff0c\u5982\u679c\u8fde\u63a5\u6210\u529f\uff0c\u89c6\u56fe\u5982\u4e0b\u3002\u53f3\u51fb\u7ea2\u8272\u7bad\u5934\u6240\u6307\u7684\u5668\u4ef6\u540d\uff0c\u9009\u62e9Program Device<\/p>\n

\n\t<\/p>\n

\n\t\u7136\u540e\u5f39\u51fa\u5982\u4e0b\u6240\u793a\u6846\uff0c\u5176\u81ea\u52a8\u4e3a\u6211\u4eec\u9009\u62e9\u4e86\u521a\u521a\u751f\u6210\u7684bit\u6587\u4ef6,\u70b9\u51fbProgram\uff0c\u5de5\u5177\u5c31\u4f1a\u5c06\u6211\u4eec\u7684bit\u6587\u4ef6\u914d\u7f6e\u5230FPGA\u91cc\u9762\u53bb\u3002\u914d\u7f6e\u5b8c\u6210\u677f\u5b50\u4e0a\u5c31\u4f1a\u51fa\u73b0\u76f8\u5e94\u7684\u6548\u679c\u3002<\/p>\n

\n\t<\/p>\n

\n\t\u603b\u7ed3<\/p>\n

\n\t\u4e0a\u8ff0\u5c31\u662f\u4e00\u4e2a\u57fa\u672c\u7684Vivado\u4f7f\u7528\u8fc7\u7a0b\uff0c\u5728\u8fd9\u4e2a\u8fc7\u7a0b\u4e2d\u7684\u6bcf\u4e00\u6b65\uff0c\u90fd\u6709\u76f8\u5e94\u7684\u5b98\u7f51\u8d44\u6599\u63a8\u8350\uff0c\u5982\u679c\u5927\u5bb6\u60f3\u8981\u6df1\u5165\u4e86\u89e3Vivado\u5177\u6709\u7684\u5f3a\u5927\u529f\u80fd\uff0c\u6700\u597d\u9700\u8981\u53bb\u770b\u770b\u8fd9\u4e9b\u6587\u6863\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"

Vivado FPGA \u8bbe\u8ba1\u57fa\u7840\u64cd\u4f5c\u6d41\u7a0b \u5f53\u7136\u5728\u4ecb\u7ecd\u7684\u8fc7\u7a0b\u5f53\u4e2d\u4f1a\u7ed9\u5927\u5bb6\u63a8\u8350\u4e00\u4e9b\u5bf9\u4e8e\u5de5\u5177\u6df1\u5165\u4f7f\u7528\u7684Xilinx\u5b98\u7f51\u8d44\u6599\u3002\u8fd9\u91cc\u4ee5\u6d41\u6c34\u706f\u7684\u63a7\u5236\u4e3a\u4f8b\u3002 Vivado\u7684\u57fa\u672c\u4f7f\u7528 (\u4e00) \u6253\u5f00Vivado\u65b0\u5efa\u5de5\u7a0b\uff1a 1. \u5b89\u88c5\u597d<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[14],"tags":[],"_links":{"self":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/1883"}],"collection":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1883"}],"version-history":[{"count":0,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/1883\/revisions"}],"wp:attachment":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1883"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1883"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1883"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}