{"id":10101,"date":"2022-09-24T09:18:17","date_gmt":"2022-09-24T01:18:17","guid":{"rendered":"http:\/\/www.szryc.com\/?p=10101"},"modified":"2022-09-24T09:18:17","modified_gmt":"2022-09-24T01:18:17","slug":"%e5%9c%a8gd32f310g-start%e5%bc%80%e5%8f%91%e6%9d%bf%e4%b8%8a%e8%af%bb%e5%8f%96%e4%b8%89%e8%bd%b4%e5%8a%a0%e9%80%9f%e5%ba%a6%e8%ae%a1","status":"publish","type":"post","link":"http:\/\/www.szryc.com\/?p=10101","title":{"rendered":"\u5728GD32F310G-START\u5f00\u53d1\u677f\u4e0a\u8bfb\u53d6\u4e09\u8f74\u52a0\u901f\u5ea6\u8ba1"},"content":{"rendered":"
\u6211\u62ff\u5230\u7684\u5f00\u53d1\u677f\u5b9e\u9645\u677f\u8f7d\u7684\u00a0MCU<\/u>\u00a0\u662f\u00a0GD32<\/u>F310G8,QFN28pi<\/u>n \u5c01\u88c5\uff0c\u57fa\u4e8e\u00a0ARM<\/u>\u00a0CORTEX M4 \u5185\u6838\uff0c\u4e3b\u9891 72MHz, \u82af\u7247\u5185\u7f6e 64KB flash,8KB SRAM<\/u>, \u4e24\u8def\u00a0I2C<\/u>\u00a0\u5916\u8bbe\u3002<\/p>\n
\u6574\u4f53\u6982\u8ff0<\/p>\n
\u9996\u5148\u611f\u8c22\u6781\u672f\u793e\u533a\u7ed9\u6211\u8bd5\u7528GD32\u5f00\u53d1\u677f\u7684\u673a\u4f1a\uff0c\u8ba9\u6211\u4f53\u9a8c\u4e00\u4e0b\u8fd1\u51e0\u5e74\u56fd\u4ea7MCU\u5f00\u53d1\u4f53\u9a8c\u3002\u8be5\u82af\u7247\u662f\u57fa\u4e8earm cortex-M4\u5185\u6838\uff0c\u4e3b\u989172Mhz,flash 64k,ram 8k\uff0c\u4ee5\u53ca\u4e30\u5bcc\u7684\u5916\u8bbe\u3002<\/p>\n
\u672c\u6b21\u8bd5\u7528\u662f\u4e00\u4e2a\u8bfb\u53d6\u4e09\u8f74\u52a0\u901f\u5ea6\u8ba1\u7684\u5b9e\u9a8c\uff0c\u4e3b\u8981\u4f7f\u7528\u7684\u662f\u786c\u4ef6iic\u3002<\/p>\n
\u786c\u4ef6\u8fde\u63a5<\/p>\n
\u4f20\u611f\u5668<\/u>\u4ecb\u7ecd<\/p>\n
SC7A20 \u662f\u4e00\u6b3e\u9ad8\u7cbe\u5ea6 12bit \u6570\u5b57\u4e09\u8f74\u52a0\u901f\u5ea6\u4f20\u611f\u5668\u82af\u7247\uff0c\u5185\u7f6e\u529f\u80fd \u66f4\u4e30\u5bcc\uff0c\u529f\u8017\u66f4\u4f4e\uff0c\u4f53\u79ef\u66f4\u5c0f\uff0c\u6d4b\u91cf\u66f4\u7cbe\u786e\u3002<\/p>\n
\u82af\u7247\u901a\u8fc7 IC\u00b2\/SPI \u63a5\u53e3\u4e0e MCU \u901a\u4fe1\uff0c\u52a0\u901f\u5ea6\u6d4b\u91cf\u6570\u636e\u4ee5\u4e2d\u65ad\u65b9\u5f0f\u6216 \u67e5\u8be2\u65b9\u5f0f\u83b7\u53d6\u3002INT1\u548cINT2\u4e2d\u65ad\u7ba1\u811a\u63d0\u4f9b\u591a\u79cd\u5185\u90e8\u81ea\u52a8\u68c0\u6d4b<\/u>\u7684\u4e2d\u65ad\u4fe1\u53f7\uff0c \u9002\u5e94\u591a\u79cd\u8fd0\u52a8\u68c0\u6d4b\u573a\u5408\uff0c\u4e2d\u65ad\u6e90\u5305\u62ec 6D\/4D \u65b9\u5411\u68c0\u6d4b\u4e2d\u65ad\u4fe1\u53f7\u3001\u81ea\u7531\u843d\u4f53 \u68c0\u6d4b\u4e2d\u65ad\u4fe1\u53f7\u3001\u7761\u7720\u548c\u5524\u9192\u68c0\u6d4b\u4e2d\u65ad\u4fe1\u53f7\u3001\u5355\u51fb\u548c\u53cc\u51fb\u68c0\u6d4b\u4e2d\u65ad\u4fe1\u53f7\u3002<\/p>\n
\u82af\u7247\u5185\u7f6e\u9ad8\u7cbe\u5ea6\u6821\u51c6\u6a21\u5757\uff0c\u5bf9\u4f20\u611f\u5668\u7684\u5931\u8c03\u8bef\u5dee\u548c\u589e\u76ca\u8bef\u5dee\u8fdb\u884c\u7cbe\u786e\u8865\u507f\u3002 \u00b12G\u3001\u00b14G\u3001\u00b18G \u548c\u00b116G \u56db\u79cd\u53ef\u8c03\u6574\u7684\u5168\u91cf\u7a0b\u6d4b\u91cf\u8303\u56f4\uff0c\u7075\u6d3b\u6d4b\u91cf\u5916 \u90e8\u52a0\u901f\u5ea6\uff0c\u8f93\u51fa\u6570\u636e\u7387 1HZ \u548c 400HZ \u95f4\u53ef\u9009\u3002<\/p>\n
\u8f6f\u4ef6\u529f\u80fd<\/p>\n
\u8be5\u8f6f\u4ef6\u4e3b\u8981\u4f7f\u7528\u4e86GD32\u5f00\u53d1\u677f\u7684\u786c\u4ef6iic\uff0c\u5916\u90e8\u4e2d\u65ad\u4ee5\u53ca\u4e32\u53e3\uff0c\u8fd9\u4e09\u90e8\u5206\u529f\u80fd\uff0c\u4e32\u53e3\u7684\u914d\u7f6e\u5728\u5176\u4ed6\u6587\u7ae0\u7684\u5f53\u4e2d\u5df2\u7ecf\u6709\u53d9\u8ff0\uff0c\u672c\u6587\u53ea\u4e3b\u8981\u4ecb\u7ecdiic\u548c\u5916\u90e8\u4e2d\u65ad\u7684\u4f7f\u7528.<\/p>\n
\u786c\u4ef6iic<\/p>\n
<\/p>\n
\u521d\u59cb\u5316gpio<\/pre>\n<\/div>\n<\/p>\n
\u914d\u7f6e\u786c\u4ef6iic<\/p>\n
<\/div>\n\u6839\u636e\u5382\u5546\u63d0\u4f9b\u7684\u5e93\u51fd\u6570\uff08\u5177\u4f53\u53c2\u8003gd32f3x0_i2c.c\u6587\u4ef6\uff09\uff0c\u6211\u4eec\u53ef\u4ee5\u5f88\u5bb9\u6613\u7684\u521d\u59cb\u5316iic\u3002\u5269\u4e0b\u7684\u5c31\u662f\u5bf9\u4f20\u611f\u5668\u8fdb\u884c\u914d\u7f6e\u4e86\uff0c\u8be5\u4f20\u611f\u5668\u9700\u8981\u914d\u7f6e\u5bc4\u5b58\u5668<\/u>\u8f83\u591a\uff0c\u5382\u5546\u76f4\u63a5\u63d0\u4f9b\u4e86\u4e00\u4efddemo\u7a0b\u5e8f\uff0c\u53ea\u9700\u8981\u9002\u914d\u8bfb\u53d6\u5199\u5165\u7684\u63a5\u53e3\u5c31\u53ef\u4ee5\u5f88\u5feb\u7684\u4f7f\u7528\u4e86\u3002<\/p>\n
<\/div>\n\u6211\u9700\u8981\u505a\u7684\u5c31\u662f\u628aiic\u7684\u8bfb\u53d6\u548c\u5199\u5165\u8fdb\u884c\u9002\u914d\u9002\u914d\u51fd\u6570\u5982\u4e0b\uff1a<\/p>\n
<\/p>\n
void I2C_Lead<\/u>erWrite<\/u>(uint16_t followerAddress, , uint8_t targetAddress, uint8_t *txBuff,\r\n uint8_t numBytes) {\r\n \/* wai<\/u>t unti<\/u>l I2C bus is idle *\/\r\n while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY))\r\n ;\r\n \/* send a start condition to I2C bus *\/\r\n i2c_start_on_bus(I2C0);\r\n \/* wait until SBSEND bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_SBSEND))\r\n ;\r\n \/* send slave address to I2C bus *\/\r\n i2c_master_addressing(I2C0, followerAddress, I2C_TRANSMITTER);\r\n \/* wait until ADDSEND bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))\r\n ;\r\n \/* clear ADDSEND bit *\/\r\n i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);\r\n \/* wait until the transmit data buffer is empty *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_TBE))\r\n ;\r\n\r\n for (i = 0; i < numBytes; i++) {\r\n \/* data transmission *\/\r\n i2c_data_transmit(I2C0, txBuff[i]);\r\n \/* wait until the TBE bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_TBE))\r\n ;\r\n }\r\n \/* send a stop condition to I2C bus *\/\r\n i2c_stop_on_bus(I2C0);\r\n \/* wait until stop condition generate *\/\r\n while (I2C_CTL0(I2C0) & 0x0200)\r\n ;\r\n}\r\nvoid I2C_LeaderRead(uint16_t followerAddress, uint8_t targetAddress, uint8_t *rxBuff,\r\n uint8_t numBytes) {\r\n \/* wait until I2C bus is idle *\/\r\n while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY))\r\n ;\r\n\r\n \/* send a start condition to I2C bus *\/\r\n i2c_start_on_bus(I2C0);\r\n\r\n \/* wait until SBSEND bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_SBSEND))\r\n ;\r\n\r\n \/* send slave address to I2C bus *\/\r\n i2c_master_addressing(I2C0, followerAddress, I2C_TRANSMITTER);\r\n\r\n \/* wait until ADDSEND bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))\r\n ;\r\n\r\n \/* clear the ADDSEND bit *\/\r\n i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);\r\n\r\n \/* wait until the transmit data buffer is empty *\/\r\n while (SET != i2c_flag_get(I2C0, I2C_FLAG_TBE))\r\n ;\r\n\r\n \/* enable I2C0*\/\r\n i2c_enable(I2C0);\r\n\r\n \/* send the EEPROM's internal address to write to *\/\r\n i2c_data_transmit(I2C0, targetAddress);\r\n\r\n \/* wait until BTC bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))\r\n ;\r\n\r\n \/* send a start condition to I2C bus *\/\r\n i2c_start_on_bus(I2C0);\r\n\r\n \/* wait until SBSEND bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_SBSEND))\r\n ;\r\n\r\n \/* send slave address to I2C bus *\/\r\n i2c_master_addressing(I2C0, followerAddress, I2C_RECEIVER);\r\n\r\n \/* wait until ADDSEND bit is set *\/\r\n while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))\r\n ;\r\n\r\n \/* clear the ADDSEND bit *\/\r\n i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);\r\n\r\n \/* while there is data to be read *\/\r\n for (int i = 0; i < numBytes; i++) {\r\n \/* code *\/\r\n\r\n \/* read a data from I2C_DATA *\/\r\n rxBuff[i++] = i2c_data_receive(I2C0);\r\n \/* send a stop condition *\/\r\n i2c_stop_on_bus(I2C0);\r\n }\r\n\r\n \/* wait until the stop condition is finished *\/\r\n while (I2C_CTL0(I2C0) & 0x0200)\r\n ;\r\n\r\n \/* enable acknowledge *\/\r\n i2c_ack_config(I2C0, I2C_ACK_ENABLE);\r\n\r\n i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);\r\n}<\/pre>\n<\/p>\n
\u7136\u540e\u628a\u8fd9\u4e24\u4e2a\u51fd\u6570\u9002\u914d\uff1a<\/p>\n
<\/div>\n\u7136\u540e\u5bf9\u4f20\u611f\u5668\u8fdb\u884c\u8bbe\u7f6e<\/p>\n
<\/div>\n\u5916\u90e8\u4e2d\u65ad<\/p>\n
\u4f7f\u7528\u5916\u90e8\u4e2d\u65ad\u53ef\u4ee5\u4f7f\u7528\u7528\u4e8e\u5524\u9192mcu\uff0c\u8fd9\u5bf9\u8bbe\u8ba1\u4f4e\u529f\u8017\u7684\u4ea7\u54c1\u5f88\u6709\u610f\u4e49\uff0c\u5f53\u4f20\u611f\u5668\u8d85\u8fc7\u8bbe\u5b9a\u7684\u9608\u503c\u7684\u65f6\u5019\uff0c\u90a3\u4e48\u5c31\u4f1a\u4ea7\u751f\u4e00\u4e2a\u4e2d\u65ad\u6765\u901a\u77e5mcu\uff0c\u9700\u8981\u8fdb\u4e00\u6b65\u7684\u5904\u7406\u6570\u636e\uff0c\u5916\u90e8\u4e2d\u65ad\u7684\u914d\u7f6e\u5982\u4e0b\u6240\u793a\uff1a<\/p>\n
<\/p>\n
void exit_wakeup_interrupt_config(void)\r\n{\r\n \/* configure the priority group *\/\r\n nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2);\r\n\r\n \/* enable the key wakeup clock *\/\r\n rcu_periph_clock_enable(RCU_GPIOA);\r\n rcu_periph_clock_enable(RCU_CFGCMP);\r\n\r\n \/* configure button pin as input *\/\r\n gpio_mode_set(GPIOA, GPIO_MODE_INPUT, GPIO_PUPD_NONE, GPIO_PIN_0);\r\n\r\n \/* enable and set key wakeup EXTI interrupt to the higher priority *\/\r\n nvic_irq_enable(EXTI0_1_IRQn, 2U, 0U);\r\n\r\n \/* connect key wakeup EXTI line to key GPIO pin *\/\r\n syscfg_exti_line_config(EXTI_SOURCE_GPIOA, EXTI_SOURCE_PIN0);\r\n\r\n \/* configure key wakeup EXTI line *\/\r\n exti_init(EXTI_0, EXTI_INTERRUPT, EXTI_TRIG_FALLING);\r\n exti_interrupt_flag_clear(EXTI_0);\r\n}<\/pre>\n<\/p>\n
\u6570\u636e\u5904\u7406<\/p>\n
\u7531\u4e8e\u6211\u4eec\u4f7f\u7528\u7684\u662f\u4e09\u8f74\u4f20\u611f\u5668\uff0c\u5bf9\u4e8e\u59ff\u6001\u4f4d\u7f6e\u7684\u8ba1\u7b97\u5e76\u4e0d\u662f\u5f88\u7cbe\u786e\uff0c\u56e0\u6b64\uff0c\u6b64\u5904\u53ea\u7528\u7b80\u5355\u89d2\u5ea6\u8ba1\u7b97\uff0c\u503e\u89d2\u7684\u8ba1\u7b97\u539f\u7406\u5982\u4e0b<\/p>\n
<\/div>\n<\/div>\n\n\u8ba1\u7b97\u4ee3\u7801\u5982\u4e0b\uff1a<\/p>\n
<\/p>\n
#define DEG_TO_RAD(x) ((x) * 0.01745329252)\r\n#define RAD_TO_DEG(x) ((x) * 57.2957795131)\r\nvoid angle_calculation() {\r\n double pitch, roll, paw;\r\n pitch = atan(xyz_mg[X] \/ sqrt(pow(xyz_mg[Y], 2) + pow(xyz_mg[Z], 2)));\r\n roll = atan(xyz_mg[Y] \/ sqrt(pow(xyz_mg[X], 2) + pow(xyz_mg[Z], 2)));\r\n paw = atan(sqrt(pow(xyz_mg[X], 2) + pow(xyz_mg[Y], 2)) \/ xyz_mg[Z]);\r\n\r\n printf(\"[RAD]pitch:%.2f | roll:%.2f | paw:%.2f rn\", pitch, roll, paw);\r\n printf(\"[DEG]pitch:%.2f\u00b0 | roll:%.2f\u00b0 | paw:%.2f\u00b0 rn\", RAD_TO_DEG(pitch), RAD_TO_DEG(roll),\r\n RAD_TO_DEG(paw));\r\n}<\/pre>\n","protected":false},"excerpt":{"rendered":"\u6211\u62ff\u5230\u7684\u5f00\u53d1\u677f\u5b9e\u9645\u677f\u8f7d\u7684\u00a0MCU\u00a0\u662f\u00a0GD32F310G8,QFN28pin \u5c01\u88c5\uff0c\u57fa\u4e8e\u00a0ARM\u00a0CORTEX […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[14],"tags":[],"_links":{"self":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/10101"}],"collection":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=10101"}],"version-history":[{"count":1,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/10101\/revisions"}],"predecessor-version":[{"id":10110,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/10101\/revisions\/10110"}],"wp:attachment":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=10101"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=10101"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=10101"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}